InnoLogic Systems Joins Novas' Harmony Program to Deliver Comprehensive Verification Offerings to SoC Designers
ESP-CV with Debussy Provides Complete Functional
Verification Coverage for Complex SoC Designs
SAN JOSE, Calif.--(BUSINESS WIRE)--March 11, 2003--
InnoLogic Systems, Inc., a provider of functional verification
solutions for full custom silicon design implementations, and Novas
Software Inc., a leader in debug systems for complex chip designs,
today announced that InnoLogic has joined Novas' Harmony partner
program. The two companies have had a long-standing relationship in
that users of InnoLogic's ESP-CV, a product that verifies the
functional equivalence between behavioral or RTL models and the
SPICE-level netlist of full custom designs, can use Novas' Debussy(R)
Debug System to investigate the causes when these models do not match.
InnoLogic's joining Novas' Harmony program further strengthens the
existing relationship between the two companies and improves the
quality of the interoperability and support that the two companies
provide for their mutual customers.
Dian Yang, president and CEO for InnoLogic noted, "InnoLogic is
focused on solving the verification challenges presented by the
increasing amount of full custom silicon content in SoC designs as
well as providing verification solutions that help our customers
increase the overall quality of their designs. As a result, we are
always looking for partner opportunities that will enhance our product
offerings. InnoLogic's ESP-CV enables designers to achieve complete
functional verification coverage of embedded memories and other full
custom components within SoC designs. And, Novas' Debussy debug system
aids designers in resolving overall design errors. The combination of
our two companies' product solutions gives our customers a significant
edge in the overall quality and confidence of their SoC products."
Scott Sandler, president and CEO of Novas stated, "The increasing
complexity and growing custom silicon content of today's SoC designs
makes them very difficult to understand and leads to very challenging
verification issues. Novas focuses on cutting debug time by making it
easier for engineers to find the causes of design behavior. Novas is
committed to partnering with companies that are on the leading edge of
addressing these issues. InnoLogic's ESP-CV offering is one of the
leading solutions for verifying the custom silicon content in SoC
designs. We believe enhanced interoperability between ESP-CV and
Debussy delivers a more productive verification experience for our
shared customer base."
Engineers designing full custom circuits such as SRAM, DRAM,
Flash, and Cache use ESP-CV to verify the functional equivalence of
the implementation SPICE netlist and the behavioral model used for
simulation. When a mismatch is found between these two independently
generated models, a counter example is generated for debugging. With
the interoperability between Novas' Debussy Debug System and
InnoLogic's ESP-CV, designers can quickly isolate errors and identify
the source of the problem. The integration of these products further
increases the productivity of full custom design verification.
About ESP-CV
InnoLogic Systems' ESP-CV product verifies the functional
equivalency of full custom designs across various levels of
abstraction. The design representations may be in Verilog behavioral,
RTL, UDPs, gates, transistor-level or SPICE netlist. If a difference
is found during the equivalence checking process, ESP-CV produces a
shallow set of binary vectors that depicts the differences. These
vectors can then be used directly in the existing simulation
environment during the debug process to determine the root cause of
the difference. ESP-CV provides transistor-level accuracy by
automatically modeling parasitic effects using an RC model based on
the transistor length, width, and process technology.
About Novas
Novas is the pioneer of knowledge-based debug systems that reduce
the functional verification costs for complex IC designs. Building
upon the strength of its market-leading Debussy(R) Debug System,
Novas' Verdi(TM) Behavior-Based Debug System improves the efficiency
of designers in the system-on-chip era with advanced design
exploration and debug capabilities. These allow design teams to better
understand and analyze complex or unfamiliar design behavior, and cut
by half or more the time it takes to locate, isolate and understand
the root causes of design problems. There are more than 10,000 Novas
systems in use today at customer sites worldwide. Novas is
headquartered in San Jose, Calif. with offices in Europe, Japan and
Asia-Pacific. For more information visit www.novas.com or send email
to info@novas.com
About InnoLogic Systems, Inc.
InnoLogic Systems, Inc. helps designers gain confidence in the
quality of design and reduces overall verification cost by offering
functional verification solutions for full custom silicon
implementations. Based on patented symbolic simulation and
transistor-level formal analysis technologies, InnoLogic's products
provide complete functional verification coverage with accurate
representation of circuit-level characteristics for full custom design
blocks contained within high performance SOC designs. The San
Jose-based company has customers throughout the world in major market
segments including semiconductor, microprocessor, and networking. For
additional information, visit www.innologic-systems.com or call
408/432-6188.
Note to Editors: InnoLogic is a trademark of InnoLogic Systems,
Inc. All other brand or product names may be trademarks or registered
trademarks of their respective companies and should be treated as
such.
CONTACT: InnoLogic Systems, Inc., San Jose
Yukari Chin, 408/432-6188 ext. 119
yukari@innologic-systems.com
or
Novas Software, Inc., San Jose
Lorie Bowlby, 408/467-7871
lorie@novas.com
or
KJ Communications, Inc.
Kella Knack, 707/568-3502
kjcomk@cs.com
